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| C8051F312 25 MIPS, 8 kB Flash, 10-Bit ADC, 32-Pin Mixed-Signal MCU Analog Peripherals 10-Bit ADC High-Speed 8051 C Core - - 1 LSB INL; no missing codes Programmable throughput up to 200 ksps Up to 21 external inputs; programmable as single-ended or differential Data-dependent windowed interrupt generator Built-in temperature sensor (3 C) Programmable hysteresis and response time Configurable to generate interrupts or reset Low current (0.4 A) Pipelined instruction architecture; executes 70% of instructions in 1 or 2 system clocks Up to 25 MIPS throughput with 25 MHz system clock Expanded interrupt handler 1280 bytes data RAM 8 kB Flash; in-system programmable in 512-byte sectors (512 bytes are reserved) 29 port I/O; all are 5 V tolerant Hardware SMBusTM (I2CTM compatible), SPITM, and UART serial ports available concurrently Programmable 16-bit counter/timer array with five capture/compare modules, WDT 4 general-purpose 16-bit counter/timers Realtime clock mode using timer or PCA Internal oscillator: 24.5 MHz, 2% accuracy supports UART operation External oscillator: Crystal, RC, C, or Clock (1 or 2 pin modes) Can switch between clock sources on-the-fly Memory Two Comparators Digital Peripherals POR/Brown-out Detector On-Chip Debug On-chip debug circuitry facilitates full speed, non-intrusive in-system debug (no emulator required) Provides breakpoints, single stepping Inspect/modify memory and registers Superior performance to emulation systems using ICE-chips, target pods, and sockets Typical Operating Current: 7 mA at 25 MHz 15 A at 32 kHz Typical Stop Mode Current: <0.1 A Clock Sources Supply Voltage: 2.7 to 3.6 V 32-Pin LQFP Temperature Range: -40 to +85 C VDD Analog/Digital Power Port 0 Latch Port 1 Latch UART P 0 D r v C R O S S B A R P 1 D r v P 2 D r v P 3 D r v CP0 GND P0.0/VREF P0.1 P0.2/XTAL1 P0.3/XTAL2 P0.4/TX P0.5/RX P0.6/CNVST P0.7 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P3.0/C2D P3.1 P3.2 P3.3 P3.4 C2D Debug HW Reset RST/C2CK POR BrownOut 8 0 5 1 8 kB FLASH 256 Byte SRAM 1 kB XRAM Timer 0,1,2,3 / RTC PCA/ WDT SMBus SPI Port 2 Latch XTAL1 XTAL2 External Oscillator Circuit 2% Internal Oscillator System Clock C o SFR Bus r e Port 3 Latch + + Temp CP1 VDD VREF 10-bit 200 ksps ADC VDD/ VREF A M U X AIN0-AIN20 Small Form Factor Copyright (c) 2004 by Silicon Laboratories 8.26.2004 C8051F312 25 MIPS, 8 kB Flash, 10-Bit ADC, 32-Pin Mixed-Signal MCU Selected Electrical Specifications (TA = -40 to +85 C, VDD = 2.7 V unless otherwise specified) PARAMETER CONDITIONS GLOBAL CHARACTERISTICS Supply Voltage Supply Current Clock = 25 MHz Clock =1 MHz Clock = 32 kHz; VDD Monitor Disabled Supply Current Oscillator off; VDD Monitor Enabled (shutdown) Oscillator off; VDD Monitor Disabled Clock Frequency Range INTERNAL OSCILLATOR Frequency A/D CONVERTER Resolution Integral Nonlinearity Differential Nonlinearity Guaranteed Monotonic Signal-to-Noise Plus Distortion Throughput Rate COMPARATORS Mode0 Response Time (CP+) - (CP-) = 100 mV Mode0 Supply Current Mode1 Response Time (CP+) - (CP-) = 100 mV Mode1 Supply Current Mode2 Response Time (CP+) - (CP-) = 100 mV Mode2 Supply Current Mode3 Response Time (CP+) - (CP-) = 100 mV Mode3 Supply Current MIN 2.7 7 0.5 15 10 <0.1 DC 24.0 24.5 10 1 1 53 200 0.10 7.6 0.18 3.2 0.32 1.3 1.0 0.40 25 25.0 TYP MAX 3.6 UNITS V mA mA A A A MHz MHz bits LSB LSB dB ksps s A s A s A s A Package Information D D1 A MIN NOM MAX (mm) (mm) (mm) 1.60 0.15 C8051F310DK Development Kit A1 0.05 E1 E A2 1.35 1.40 1.45 b 0.30 0.37 0.45 9.00 7.00 0.80 9.00 7.00 - 32 D D1 1 PIN 1 IDENTIFIER A2 e A b A1 e E E1 Small Form Factor Copyright (c) 2004 by Silicon Laboratories 8.26.2004 Silicon Laboratories and Silicon Labs are trademarks of Silicon Laboratories Inc. Other products or brandnames mentioned herein are trademarks or registered trademarks of their respective holders |
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